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| Datasheet File OCR Text: |
| revision 1/february 12, 2001 ! " # $ % &! ' (' $ ) the sk10/100el16v is a differential receiver with variable output swing. its vctrl input controls the amplitude of the q and q* outputs. the operating range of the el16v control input, vctrl, is from vbb (large swing) to vcc (min swing), see figure 2. simple control of the output swing can be obtained by a variable resistor between the vbb and vcc pins, with wiper driving ctrl. typical application circuits and results are described in figures 1a, 1b, and 2. the sk10/100el16v provides a vbb output for either single-ended use or as a dc bias for ac coupling to the device. the vbb pin should be used only as a bias for the el16v as its current sink/source capability is limited. whenever used, the vbb pin should be bypassed to vcc via a 0.01 f capacitor. under open input conditions, the pulldown resistor on d, pulldown and pullup resistors on d* will force the q output low and q* output high. the vctrl pin should be bypassed to vcc via a 0.01 f capacitor when the pin is used. 1 2 3 4 8 7 6 5 75k 75k 36.5k v ctrl v bb d d* v cc v ee q q* ? extended supply voltage range: (vee = ?5.5v to ?3.0v, vcc = 0v) or (vcc = +3.0v to +5.5v, vee = 0v) high bandwidth output transitions 300 ps propagation delay vbb output internal input resistors: pulldown on d, pulldown and pullup on d* q output will default low with inputs open or at vee new differential input common mode range esd protection of >4000v specified over industrial temperature range: ?40 o c to 85 o c available in both 8 pin soic (150 mil) and msop (3mm x 3mm) packages revision 1/february 12, 2001 notes: 1. dimensions are in millimeters. 2. dimensions d and e do no include mold protrusion. 3. maximum mold protrusion 0.15 per side. 4. dimension b does not include dambar protrusion. allowable dambar protrusion shall be 0.127 total in excess of the b dimension at maximum material condition. end view h x 45 o c q l top view 8 5 1 4 d e h e b a 0.25 m b m b c a1 a 0.25 m c b s a s 0.10 seating plane 8 pin soic package ! " ! ! # ! # $ # #! # % ! # $ # # & '# # (# & # # ' " $ ! )# & # $ * + $ ## # # ' #" $ ! # & revision 1/february 12, 2001 notes: 1. dimensions are in mm. 2. controlling dimension: mm 3. dimension does not include mold flash or protrustions, either of which shall not exceed 0.20. 8 pin msop package ' % #! ! ! $ # ' # ! #$ $ # # % $# ! (# % $# ! * # )" '! ' #" # # * 5 4 8 1 top view bottom view end view detail a see detail a h e b e d a c l revision 1/february 12, 2001 (notes 1, 2) (v cc ? v ee = 3.0v to 5.5v; v out loaded 50 ? ? ? ? ? to v cc ? 2.0v) ! ( ( , - ( # ! ( # # ! ' ! * ! " $ $ ' ! * ! " $ $ ' ! * ! " $ $ ' ! * ! " $ $ . . % ( # ! ( # # ! ' ! / & ! / # ! / * $ ! / & ! / & ! / " $ ! / * $ ! / ! / & ! / $ ! / * $ ! / ! ! / & ! / % ! ! / * $ ! / 0 ( ( , # # # # 1 2 3 4 5 2 ( 3 # ! /# ! # ! # ! /# ! # ! # ! /# ! # ! # ! /# ! # ! 6 6 - / - & # " # # *# *# * . 7 - / - & # # !# # !# # !# # ! . 7 - - # ! # !# # # !# !# # # !# !# # # !# !# # # ! . revision 1/february 12, 2001 ! ! ! ! ! 8 . . . 8 9 , : ; ' # $# $# $# $< ) = ) - ) - , 2 ; ; 3 2 ( 3 " $ # $ # % $ # # # ! # ' # & $ # $ # # # ! # $ # # % $ # $ # ! $ # * % $ # $ # $ # # ' # " = . * $ > ? ? , , 2 ; ; 3 # $ # $ # $ # $ . ; @ 2 a # & a # $ 3 # $ !# ' ! " ! !# * ! & ! !# * !# % !# ' !# " !# # $ 9 > 9 . . " ( ( b " ! 0 ' # ( ( b " ! 0 ' # ( ( b " ! 0 ' # ( ( b " ! 0 ' # - / - & # " # # *# *# * . 7 - / - & # # !# # !# # !# # ! . 7 ta = ? 40 o c "!#$ o c "!#% o c "!#%& o c notes: 1. 10el circuits are designed to meet the dc specifications shown in the table after thermal equilibrium has been established. the circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained. outputs are terminated through a 50 ? resistor to vcc ? 2.0v. 2. 100k circuits are designed to meet the dc specification shown in the table where transverse airflow greater than 500 lfpm is maintained. 3. duty cycle skew is the difference between t plh and t phl propagation delay through a device. 4. f max guaranteed for functionality only. see figure 3 for typical output swing. vo p-p levels are guaranteed at dc only. 5. v ctrl voltage range should be between v bb to v cc . 6. the device has a dc gain of ~40. 7. cmr range is referenced to the most positive side of the differential input signal. normal operation is obtained if the high level falls within the specified range and the peak-to-peak voltage lies between vpp (min) and 1v. the lower end of the cmr range varies 1:1 with vee and is equal to vee + 1.7v. 8. vo p-p is obtained as follows: voltages of q and q* outputs with respect to vcc are measured. the absolute difference between a high and a low state is equal to vo p-p . 9. voltages referenced to vcc = 0v. 10. minimum input swing for which parameters are guaranteed. 11. for standard ecl dc specifications, refer to the ecl logic family standard dc specifications data sheet. 12. for part ordering description, see hpp part ordering information data sheet. (v cc ? v ee = 3.0v to 5.5v; v out loaded 50 ? ? ? ? ? to v cc ? 2.0v) ' revision 1/february 12, 2001 ! ( continued ) figure 1a figure 2. typical voltage output swing at 25 o c 100 75 50 25 0 v ee v cc ?1.32 v cc ?0.8 v cc ?0.4 v cc v ctrl = open voltage control (v) voltage swing (% pk-pk differential) implementation of voltage source figure 1b 1 2 3 4 8 7 6 5 v ctrl v bb v cc d d* v cc v swing (pk-pk) gnd q hg q hg * + r1 r2 note: r1 = r2 = 150 ? for vcc = 3.3v r1 = r2 = 330 ? for vcc = 5.0v 1 2 3 4 8 7 6 5 v ctrl v bb v cc d d* v cc v swing (pk-pk) gnd q hg q hg * r1 r2 10k note: r1 = r2 = 150 ? for vcc = 3.3v r1 = r2 = 330 ? for vcc = 5.0v ( revision 1/february 12, 2001 figure 3. typical output v pp vs. frequency v pp amplitude (v) 900m 800m 700m 600m 500m 400m 300m 200m 0.0 1.0g 2.0g 3.0g 4.0g frequency (hz) input conditions: 800 mv peak-to-peak ! ( continued ) & revision 1/february 12, 2001 " # " $ " ! * ! ( # ! c / & > * ! ( # ! c / & > * ! ( # # ! c / & > * ! ( # # ! c / & > 9 * ! ( # ! c - 9 / & > 9 * ! ( # ! c - 9 / & > 9 * ! ( # # ! c - 9 / & > 9 * ! ( # # ! c - 9 / & > d * ! ( # ! c d * ! ( # # ! c ) * + revision 1/february 12, 2001 function / voltage option function code / part number assembly lot number assembly date code sk10el/elt = h sk100el/elt = k 8/10 pin msop packages function / voltage & device operation function code / part number h = 10 k = 100 yy: last two digits of the year ww: working week el ww yy 8 pin soic package assembly lot number , division headquarters 10021 willow creek road san diego, ca 92131 phone: (858) 695-1808 fax: (858) 695-2633 marketing group 1111 comstock street santa clara, ca 95054 phone: (408) 566-8776 fax: (408) 727-8994 semtech corporation high-performance products division |
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